$TVM$: An automated end-to-end optimizing compiler for deep learning. Tianqi Chen, Thierry Moreau, Ziheng Jiang, Lianmin Zheng, Eddie Yan, Haichen Shen, Meghan Cowan, Leyuan Wang, Yuwei Hu, and Luis Ceze.
In Proceedings of the International Conference on Architectural Cupport for Programming Languages and Operating Systems (ASPLOS). DianNao: A Small-footprint High-throughput Accelerator for Ubiquitous Machine-learning.
The case for energy-proportional computing. CACTI 7: New Tools for Interconnect Exploration in Innovative Off-Chip Memories. Kahng, Naveen Muralimanohar, Ali Shafiee, and Vaishnav Srinivas. In Proceedings of the Annual IEEE/ACM International Symposium on Microarchitecture (MICRO). Manoj Alwani, Han Chen, Michael Ferdman, and Peter Milder.The proposed off-line and on-line graph-based fusion algorithms can reduce 10.1% - 72.2% off-chip memory traffic and obtain 1.71x - 3.94x energy efficiency over SOTA baselines on DNN workloads, and they bring significant power-efficiency boost to the DNN processors of different architectures and dataflows. Optimus includes an accurate memory cost model to evaluate fusion schemes, and a Computing-Graph (CG) based layer fusion algorithm, which generates high-efficiency layer-fusion schemes for arbitrary network architectures on DNN processors. This work formalizes the layer fusion problem for DNN processors, proves that prior fusion solutions cannot guarantee memory-level optimality, and presents a novel neural network fusion framework, Optimus.
#Optimus hecta fusion how to
However, how to fuse the neural layers is still a challenging issue that heavily depends on both the network architecture and the specific DNN processor configuration.
Neural network layer fusion has been proposed to parallelize the inference of neural layers and thus significantly reduces the feature-induced memory accesses.
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